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74LS devices are not really suitable due to having non-symmetrical outputs (they can sink 8mA but only source 400uA).

Only one wire is driven at a time. This is necessary to fulfill the requirement of not having a common ground wire. All output lines are normally high, and a low pulse appears on each wire in turn. The total time taken to cycle round all outputs is approximately half a second

The readout unit has two probes, which for clarity I will refer to as the "Reading" probe and the "Non-Reading" probe. The display on the readout indicates the number of the wire that the "Reading" probe is connected to. The "Non-Reading" probe may be connected to any other wire. Please remember that the power rails in the Sender and Readout units are not linked together, so some sort of reference is needed.

The "Non-Reading" probe is internally connected to the readout positive rail. The level on the "Reading" probe therefore goes low for a period, depending on which wire it is connected to. Then the wire that the "Non-Reading" probe is connected to goes low, this effectively results in the "Reading" probe going 5V higher than a logic high level. This does not reach the logic devices due to a resistor-diode circuit, and is ignored.

Hopefully this is clear - it is not the easiest arrangement to describe!

Circuit Operation - Sender Unit
We will start with the Sender unit. The complete circuit is shown in figure #.

IC1a and IC1b (4093) form an oscillator running at about 5KHz. This drives a 4024 counter (IC2). The outputs of IC2 and another counter (IC3) are compared by a logic comparator (IC4), the output of which goes low when the two inputs are equal. This resets IC2 and increments IC3.

Assume the decimal value of the outputs of IC3 is at ten. Also assume IC2 has just been reset, so the value of it's outputs is zero. These two output values are not equal, so the output on pin 19 of IC4 is high. Once IC2 has received ten clock pulses from the oscillator, it's output will be equal to that of IC3, and the output of IC4 will go low. This will increment IC3 so it's output value is eleven, and also reset IC2 so it's output value is again zero. As soon as this occurs the counter outputs are no longer equal so the output of IC4 will go high again. The sequence now repeats, but this time eleven clock pulses are needed before the two counter outputs are equal.

The outputs of IC3 are decoded into 64 individual outputs by IC5 through IC13. The 74HC138 is a three to eight line decoder, with active-low outputs. IC5 decodes into banks of eight, which are then individually decoded by IC6 to IC13

Therefore each of these decoded lines will go low in turn, for a period determined by the number of clock cycles needed for the two counter outputs to become equal. Referring to the previous examples, the "10" output (SK11) will be low for ten clock cycles, and the "11" (SK12) output will be low for eleven clock cycles. The output number is the SK terminal number less one.

Output "0" from SK1 will be low for a very short duration, set by the values of C7 and R6. This may not work properly in practice, so it may be better to just use outputs "1" to "63". The delay components were found to be necessary to ensure IC2 resets correctly and IC3 increments correctly.

If less than the full 64 outputs are required, you can omit some of the higher numbered 74HC138 devices. In this case, connect a wire from the pin 4 position of the first omitted device to SK66. This will cause the counter system to be reset when the missing device is reached, speeding up the process by not generating unwanted outputs.

I originally planned to run the circuit from a 6V battery with a diode to drop 0.7V. However the frequency of the oscillator was found to vary with supply voltage, so the output pulse durations would vary as the battery ran down.

Instead I have used a 78L05 regulator, run from a 9V battery. The LED (D1) across the regulator lights when the voltage across it exceeds about 2.5V, indicating that the battery is OK. The LED series resistor (R4) has a high value to ensure insufficient current flows through it to disturb the action of the regulator. If you are using a higher voltage battery or a mains power supply unit, you may need to increase R4 further, or omit D1 and R4 completely.