Originally published by Paul Stenning in the Winter 1994/95 Cirkit Catalogue

• Diagrams and Schematics

Over time many of us accumulate a stock of components, including logic IC's (TTL and CMOS). If you're anything like me, many of these will be secondhand - salvaged from old projects and PCBs. The problem is checking which of these devices actually work, particularly when they are removed from faulty equipment.

The ChipTester presented here is used with an IBM compatible PC, and will test nearly all logic devices, providing they operate from a single 5V supply and have no more than 24 pins. Devices with over 20 pins must have the power pins on the usual diagonally opposite corners. The only logic devices that cannot be tested are those incorporating analog techniques, such as monostables and phase locked loops.

This system may also be useful for educational establishments, for checking devices removed from students projects before returning them to the stores for reuse.

The accompanying software is available on this website. The software will operate on any PC running MS-DOS or PC-DOS version 3.0 or later and having at least 512K of RAM and one RS232 serial port. A hard disk and a colour monitor are strongly recommended. The software is written in Microsoft QuickBASIC V4.5, and the full source code is supplied for those wishing to enhance or modify it. This source code is also compatible with QBASIC, as supplied with MS-DOS 5.0 and later. Several sample device files for common logic devices are also included.

The software allows the creation of test parameters for new devices, which can be saved to disk. Devices can be tested either once only, or continuously to find intermittent faults. As the tests progress the logic levels on each pin are displayed using colours. A detailed description of the software operation is given later.

The unit may also be suitable for use with other types of home computer having an RS232 serial port, although this has not been tested and no software is available. It will definitely not work with Commodore Amiga computers, due to a peculiarity in the serial port handling.

The Works
The circuit diagram is spread over a number of illustrations. Although it may initially look complex, it is in fact relatively straightforward. When a "-" follows a signal name (for example STROBE-), this shows that the line is active low. When a number is followed by an "h" this indicates that the number is hexadecimal.

The RS232 (serial) interface, buffering and clock are shown in figure *. IC3 (6402) is a UART (Universal Asynchronous Receiver/Transmitter) which basically converts serial data to parallel and vice-versa. The device supports most common serial data formats, in this application it is configured to give eight data bits, one stop bit and no parity checking. The data rate is set by the crystal controlled clock circuit (IC2), which in most cases will be set to 9600 Baud.

IC1 is the RS232 buffer, converting the 5V data from the UART to the +/- 10V RS232 standard, and vice-versa. This device contains a voltage doubler and voltage invertor circuit, producing +/- 10V rails from a single +5V input. The four external capacitors (C1 to C4) are required for these circuits.

A byte of serial data arriving on pin 20 of IC3 will be converted to parallel data, which will appear on pins 5 to 12. Pin 19 will go high, and no further data can be received until pin 18 is taken low momentarily. One gate of IC4 causes this to happen, R3 and C8 create a slight delay giving the STROBE- pulse adequate width for clocking other devices. When pin 23 is pulsed low, the parallel data on pins 26 to 33 is transmitted in serial form from pin 25. R4, D1, C9 and one gate of IC4 produce the power-on reset pulse for IC3.

Since the device being tested will have more than eight pins, we need a method of connecting the eight input lines and eight output lines on the UART to the 24 pins on the test socket. We also need to arrange for the data to be transmitted by the ChipTester when required.

The data output from the UART is divided into two sections. Lines R0 to R3 are used as four data lines, and lines R4 to R6 are used as three address lines, to control where the four bits of data go to. The eighth output line is not used.

The decoding and output buffering is shown in figure *. The three "address" lines (R4-R6) are decoded by IC15. The STROBE- signal is connected to one of the enable pins so that a short pulse appears on the appropriate output (Y0-Y5). These pulses are used to clock the four data bits into the appropriate 74LS75 latch (IC5 to IC10). Thus, 24 bits of data can be sent in six bytes.