The ZN448E (IC7) is an 8 bit successive approximation A-D convertor. Nine clock cycles are required for each conversion. The eight data lines are tri-state, and controlled by the OE- pin.

The device contains a built in clock circuit, the frequency of which is set by C13. The data sheet gives the maximum clock frequency as 1MHz, and a graph shows that a capacitor value of 100pF will give this. However tests with several devices showed that 100pF gave a frequency of only about 500KHz. To achieve 1MHz a 47pF capacitor is required. It is possible that some ZN448E devices will fail to operate with a 47pF clock capacitor. In which case replace C13 with a 100pF component, or the lowest value that gives correct operation. R10 is the biasing resistor for the internal voltage reference, which is decoupled by C12.

The ZN428E (IC8) is an 8 bit D-A convertor, which uses an R-2R resistor network driven by an accurate voltage reference. This reference is biased by R14 and decoupled by C15. A latch circuit on the data input lines is controlled by the EN- pin. When EN- is inactive, the previous output voltage remains.

The audio signals to the A-D convertor and from the D-A convertor pass through identical low pass filter circuits. These have a slope of 24dB per octave and a -3dB point at about 8KHz. The frequency response of these filter circuits is shown in figure *. The variation of +/- 1.3dB before the cutoff point is not important in this application.

The filter on the input to the A-D prevents any signals with a frequency too high to be accurately sampled from reaching the convertor. Allowing these signals through would result in severe aliasing distortion, leading to a poor quality output. The filter on the D-A output removes noise due to the sampling frequency, and smooths the stepped output to some extent.

The audio output from the delay circuit is mixed with the input signal by the circuitry around IC10. VR2 sets the amount of signal that is fed back around the system.

The circuit is powered by a 12V 250mA transformer. The required +5V (VCC) and +12V supplies are regulated by standard three pin linear regulator IC's.

Construction
The circuit is constructed on a single sided PCB. The track layout and component positioning are shown in figure *.

There are 30 links that should be made first, using thin (approx. 26SWG) tinned copper wire. The resistors, diodes and capacitors can then be fitted in size order. Sockets may be used for the IC's if required - since all the devices are static sensitive this may be a good idea. Do not insert the IC's into the sockets until the remainder of the PCB construction is complete.

Digital echo unit component layout

IC11 and IC12 will become warm in operation and should be mounted on a small heatsink. The mounting tabs of both devices are connected to the 0V rail so no insulation washers are required. A small amount of silicone grease or heat transfer paste should be placed between the devices and the heatsink.

Terminal pins may be fitted in the holes for the off-board wiring, so that the connections can be made after the PCB is fitted into the case.

The prototype was constructed in a plastic case, 190mm * 165mm * 68mm, see parts list for details. A suitable overlay for the front panel is shown in figure *. Two photocopies may be taken (enlarge to 162mm * 64mm), one can then be used as a drilling template while the other may be fixed to the front panel with clear self-adhesive vinyl. No actual values are shown for the delay controls, since they might confuse a nontechnical user.

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